In the semiconductor device manufacturing industry, two oxide processes rather than triple gate oxide processes are predominantly used due to their accompanying advantages, which include low manufacturing costs among other factors. Low voltage thin gate oxide transistors, which are manufactured based on the two oxide processes, often interface with a high input/output (I/O) power supply or VDDIO. For example, the low voltage thin gate oxide transistors may operate at 1.8 volts with 10 percent reliability limit and interface (e.g., using a input receiver) with a VDDIO of 2.5 to 3.3 volt (e.g., using a voltage regulator).
However, the reliability of one or more devices in a chip may be threatened when it directly interfaces with an external signal from another chip of a higher power level if the power which needs to support the interface means (e.g., the input receiver) is absent or the power level is improperly set. Further, the reliable operation of the devices may not be possible if the power level supplied by the VDDIO realized by the voltage regulator is not adequate. For example, typically 70 percent (e.g., 2.3 volts) of the target power level (e.g., 3.3 volts) may be needed for the devices to operate reliably.
Currently, power-good detect circuitry is used to detect the power level generated by the voltage regulator. The power-good detect circuitry typically comprises a band gap and a comparator. A reference voltage is one input to the comparator and an output of the voltage regulator is another input to the comparator. Based on the inputs, the power-good detect circuitry decides whether the power level is ramped adequately, which is typically at 70% of the target voltage. However, the existing power-good detect circuitry is rather complex to implement since it needs a number of components and a complex design.